EMI Case Analysis of Bridgeless Boost PFC Circuit

At present, power factor correction has been developing in the direction of high efficiency, simple structure, easy control, and reduced EMI. Therefore, bridgeless Boost PFC circuits have attracted more and more attention as an effective way to improve efficiency.

The bridgeless Boost PFC circuit omits the rectifier bridge of the traditional Boost PFC circuit, and at least one diode is turned on at any time than the conventional Boost PFC circuit, so the conduction loss is reduced, and the efficiency is greatly improved. The bridge Boost PFC circuit was compared and analyzed, and the two representative bridgeless circuits were tested and EMI tested.

Electromagnetic interference (EMI) can be divided into two types: conducted interference and radiated interference. When the harmonic level of the switching converter circuit is in the high frequency range (frequency range above 30 MHz), it appears as radiated interference, and when the switching converter circuit Harmonic levels appear as conducted interference in the low frequency range (frequency range 0.15 ~ 30 MHz), so the switching converter circuit is mainly conducted interference. Conducted interference currents can be divided into two categories according to their flow paths: one is differential mode interference current and the other is common mode interference current.

Taking the Boost circuit shown in Figure 1 as an example, the EMI of the switching converter circuit is analyzed. The pulsating current generated during the rectification of the circuit introduces a large amount of harmonics to the circuit system, although there is an electrolytic capacitor C on the rectified output side. Except for some harmonics, but because the electrolytic capacitor has a large equivalent series inductance and equivalent series resistance, it is impossible for the electrolytic capacitor to completely absorb these harmonic currents, and a considerable part of the harmonic current has to be equivalent to the series inductance of the electrolytic capacitor. Interacting with the equivalent series resistance, the differential mode current Idm is returned to the AC power supply side, and the propagation path of the differential mode current is shown by the solid line with an arrow in FIG. The high-frequency on-off of the switch tube generates a high dv/dt, which interacts with the parasitic capacitance Cp between the power tube and the heat sink to form a common mode current Icm. This common mode current reaches the ground through the heat sink, and the ground line The mode current is coupled to the phase and neutral lines on the AC side through parasitic capacitances Cg1 and Cg2 to form a common mode current loop. The propagation path of the common mode current is shown by the dotted line with an arrow in FIG.

The differential mode currents formed in various common bridgeless Boost PFC circuits are identical with the same main circuit parameters. The difference is the common mode current caused by the position of the switch tube and the addition of the diode. Therefore, this paper mainly analyzes the common mode interference in various circuit structures. The parasitic capacitance of each point is replaced by the magnitude of the potential change between the points to the input side zero line and the frequency change.

The most basic bridgeless PFC main circuit structure is shown in Figure 2. It consists of two fast recovery diodes (D1, D2) and two switching tubes (S1, S2) inductors (L1, L2). The driving signals of the switching tubes S1 and S2 are the same, and the two tubes are turned on and off at the same time. For the positive and negative half cycles of the power frequency AC input, the bridgeless Boost PFC circuit can be equivalent to a combination of two Boost PFC circuits with opposite supply voltages, one for the inductors L1 and L2, the switch tubes S1, D1 and the switch. The body diode of the tube S2 is composed, and its conduction mode is as shown in FIG. 3a; the other group is composed of the body diodes of the inductors L1 and L2, the switch tubes S2 and D2 and the switch tube S1, and its conduction mode is as follows. Figure 3b shows. It can be seen from Fig. 3 that only two semiconductor devices are turned on at any one time, and one diode is turned on less than the conventional PFC circuit with a rectifier bridge, thereby reducing the conduction loss and improving the efficiency. However, its shortcoming is that the inductor current sampling is difficult. It can be seen from Fig. 3 that the circuit structure cannot obtain the current sampling with the same polarity on one loop, so it is necessary to construct a complex inductor current detecting circuit [4]. In addition, the biggest problem of this circuit is that the common mode interference is large. The waveform between the points in Figure 2 and the input zero line can be analyzed to obtain the waveform shown in Figure 4, where Vbus is the output DC bus voltage and Vline is instantaneous. Input voltage. It can be seen from Fig. 4 that the potential between the U-side, the A-point, the B-point of the busbar and the side of the power supply floats with the switching frequency [5], so a large parasitic capacitance occurs between the above points and the input power ground. Common mode interference is more serious, and EMI problems are more prominent.

Because of the large EMI and other problems, a new bridgeless Boost PFC circuit structure has been proposed on the basis of Figure 2. They all have the advantages of low conduction loss and high efficiency, and have advantages in inductor current sampling and EMI suppression. Improvements.

Figure 5 is a new bridgeless structure proposed on the basis of Figure 2, where D1 and D2 are fast recovery diodes. Its conduction path is similar to that of Figure 2. Only two semiconductor devices are turned on at any one time, but it adds two new diodes D3 and D4. During the positive half cycle of the input power supply, the power supply N side and the bus U-side pass. Diode D4 is directly connected. In the negative half cycle of the input power supply, the power supply N side is directly connected to the bus U-side through the diode D3, which improves the VU--N with large fluctuations in the switching frequency in the structure of Fig. 2. Fig. 6 is another representation of Fig. 5, the circuit structure of which is identical. The waveform shown in Fig. 7 can be obtained by analyzing the potential between each point in Fig. 6 and the power source N side. Where Vbus is the output DC bus voltage and Vline is the instantaneous input voltage. Compared with FIG. 4, it can be seen that only the potential between the point A and the power source N fluctuates with the switching frequency, so the common mode interference can be greatly reduced. However, their disadvantage is that the gate potentials of the two switching tubes are different, so the driving must be isolated, which is slightly complicated in the design of the driving circuit. Moreover, the inductor current sampling requires a complicated detection circuit as in Fig. 2.

Figure 8 is an improved circuit [6] based on Figure 2, S1 and S2 using an IGBT without a body diode, D3 replacing the S1 body diode, D4 ​​replacing the S2 body diode, and before connecting the diode cathode to the inductor, it The conduction path is basically the same as that of FIG. 2, except that the current flows through only one inductor in each positive and negative period. When the current flows through the body diode in FIG. 2, D3 or D4 flows through the structure. The advantage of this is that as long as a sampling resistor is added between D3 and D4 and S1 and S2, the inductor current sampling can be conveniently performed, and the inductor current detecting circuit can be greatly reduced.

This structure connects the cathodes of D3 and D4 to the inductor, which not only makes the inductor current sampling simple, but also greatly reduces the EMI. Analysis of this circuit shows that in the positive half cycle of the input power supply, the power supply N side and the bus U-side Directly connected by diode D4, in the negative half cycle of the input power supply, the power supply L side and the bus U-side are directly connected through the diode D3, which improves the VU--N with large fluctuations in the switching frequency in the structure of Fig. 2. The waveform shown in Fig. 9 can be obtained by analyzing the potential between each point in Fig. 8 and the power source N side. Where Vbus is the output DC bus voltage and Vline is the instantaneous input voltage. Compared with Figure 4, it can be seen that the common mode interference can be greatly reduced. But the disadvantage is that it only circulates one inductor every half cycle, the inductance increases, and the inductance utilization is not high.

Figure 10 is another less-used bridgeless structure. It is substantially the same as the conduction path of FIG. 8, and the inductance L1 flows in the positive half cycle of the input voltage, and the inductance L2 flows in the negative half cycle, which also has the disadvantages of large inductance. The difference is that D3 and D4 are directly connected to the input power supply N side, so that in the positive half cycle of the input voltage, the power supply N side and the bus U-side are directly connected through the diode D4, and in the negative half cycle of the input power supply, the power supply N side and the bus U+ side pass. Diode D3 is directly connected to minimize EMI interference and can be verified from Figure 11. Figure 11 is an analysis of the potential between each point in Figure 10 and the input zero line. Where Vbus is the output DC bus voltage and Vline is the instantaneous input voltage. Compared with Figure 4, it can be seen that the common mode interference can be greatly reduced. However, the shortcoming is the same as the circuit structure of FIG. 5, the inductor current sampling is complicated, and the two switch tube drivers need to be isolated, and a complicated driving circuit needs to be constructed.

Figure 12 is an evolution on the basis of Figure 2, also known as a totem-type bridgeless structure, its conduction path is consistent with Figure 2, its circuit structure is similar to Figure 10, both input power supply N side through D1 And D2 is directly connected to the U-side of the busbar or the U+ side of the busbar. It can be seen from Figure 13 that the common mode interference is much smaller than that of Figure 4. Moreover, compared with the circuit of FIG. 10, the advantage is that the number of devices used is small, and in the case where the EMI interference is substantially the same, two diodes are used less than the structure of FIG. 10, which can reduce the cost. However, this circuit structure is generally used in discontinuous mode (DCM) and critical conduction mode (CRM), and its structure is analyzed. The body diodes of the two switching tubes play a similar role to the fast recovery diodes in the conventional Boost PFC. . However, the reverse recovery time of the switching body diode can only reach 100 ns at the fastest, which is quite obvious compared to tens or even ten nanoseconds (ns) of the fast recovery diode. Therefore, if such a circuit is used in a continuous current mode, the reverse recovery loss will be very severe and the efficiency improvement will be limited. If you work in critical current mode, you can take advantage of this topology because there is no reverse recovery problem. In the inductor current detection, this structure is the same as the sampling circuit of Figure 2. Moreover, in this circuit, two switching tubes are required to be driven separately, and it is necessary to judge the positive and negative periods, and to build a zero-crossing detection circuit. In addition, the gate potentials of the two switching transistors are different, and the driving must be isolated, so the driving circuit is also complicated.

In this paper, the test prototypes are designed with the main circuit structure as shown in Fig. 2 and Fig. 8. The parameters of the two main circuits are the same, the PCB layout is similar, and the control chip adopts IR1150. The schematic diagrams are shown in Fig. 14 and Fig. 15, respectively. The EMI test was performed on two circuits with a 220 V input of 1 000 W output. Figure 16 is the EMI test diagram of Figure 14. It can be seen from the figure that the EMI of the designed circuit exceeds the Class C peak standard over a large range of the mid-band.

Figure 17 is the EMI test chart of Figure 15. It can be seen from the figure that when this main circuit structure is adopted, the EMI test waveform is lower than the EMI test standard in most frequency bands, and only exceeds the standard in the high frequency band. This problem can be solved by properly designing an EMI filter. Therefore, the circuit structure has a good effect on EMI suppression.

This paper compares the conduction path and EMI interference of several common bridgeless PFC circuits, and designs experimental prototypes based on two kinds of characteristic bridgeless POST topology. The EMI was actually measured. A topology with low conduction loss and low EMI interference is summarized.

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